Table of ContentsCCP Data Acquisition Organization: Motivation Hardware Choices: Interface Busses: VME Hardware Choices: Interface Busses: PCI Marry the PCI and VME bus Hardware Choices: CPUs PCI/VME transfer timings: Possible O/S choices. Windows NT and Latencies Windows NT and latencies Latencies on Various O/S: General Conclusions: Smart Hardware? “Final” block Diagram Recent Developments Architecture of a VME SBC |
Author: Ron
Fox Email: fox@nscl.msu.edu Home Page: http://www.msu.edu/user/foxr |